SLE-structuring and Surface Polishing for the Fabrication of Multi-Segmented Ion Traps

The up-scaling of trapped ion quantum computers relies on the segmentation and miniaturization of the traditional macroscopic ion traps to enable the storage of multiple sub clusters of the ions that serve as qubits [1,2]. We want to achieve this while maintaining favorable qualities like a deep trapping potential and low heating rates at room temperature, both associated with 3D Paul traps. We established a special purpose clean room where we can fabricate trap chips with versatile 3D-geometries in fused silica using Selective Laser-induced Etching (SLE), followed by surface polishing using a scanning CO$_2$-Laser [3] and metallic sputter deposition. We report on different fabricated trap designs, linear shuttle segments and X-junctions [4].